Bryon Moyer
Writer/Reporter at Semiconductor Engineering
Technology writer, engineer, manager, talking about cool technology especially in the Internet of Things, semiconductors, and design tools.
Articles
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2 weeks ago |
semiengineering.com | Bryon Moyer
Increasing levels of semiconductor integration means more work needs to be done in smaller spaces, which in turn generates more heat that needs to be dissipated. Managing heat dissipation in advanced node dies and in multi-die assemblies is critical to their functionality and their longevity. And while much of the focus has been on improving power efficiency, which reduces the rate of power growth, that alone is insufficient.
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3 weeks ago |
semiengineering.com | Bryon Moyer
UCIe, a standard for die-to-die interconnect in advanced packages, has drawn concern about being too heavyweight with its 2.0 release. But the fact that many of the new features are optional seems to have been lost in much of the public discussion. In fact, new capabilities that support a possible future chiplet marketplace are not required for designs that don’t target that marketplace. “It’s the blessing and the curse of UCIe,” said Mick Posner, senior product marketing group director at Cadence.
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3 weeks ago |
chiplet-marketplace.com | Bryon Moyer
Many features of UCIe 2.0 seen as “heavy” are optional, causing confusion. By Bryon Moyer, SemiEngineering | May 15, 2025UCIe, a standard for die-to-die interconnect in advanced packages, has drawn concern about being too heavyweight with its 2.0 release. But the fact that many of the new features are optional seems to have been lost in much of the public discussion.
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1 month ago |
semiengineering.com | Bryon Moyer
Chiplets are emerging as a significant new phase in the evolution of the semiconductor market, providing a way to continue scaling performance well beyond the size limitations of a reticle. But that improvement comes with a high price tag and a lot more complexity, which so far has limited adoption. One of the main reasons for the cost increase is the need for advanced packaging when employing chiplets, which represents a fundamental shift in how semiconductors are designed, built, and tested.
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1 month ago |
chiplet-marketplace.com | Bryon Moyer
The economics are not yet clear for industrial or consumer electronics. By Bryon Moyer, Semi Engineering | April 17th, 2025Chiplets are emerging as a significant new phase in the evolution of the semiconductor market, providing a way to continue scaling performance well beyond the size limitations of a reticle. But that improvement comes with a high price tag and a lot more complexity, which so far has limited adoption.
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RT @techinsightsinc: DSPs and DPUs! Cars, #5G, #cloud! Join Linley Gwennap as he moderates a session on specialized processors w/ @CEVA_IP,…
This week is about chips powering advanced driver-assist systems in newer cars. https://t.co/HlqwbQCWeE (Next week these should also come with a nicer picture too...) #adas #asild #asilb #automotive #automotivesoc #autonomousvehicles #renesas via @TechInsightsLGC
There's a new standard called UCIe for use in connecting chiplets within a package. https://t.co/6QVGDwtqUz #chiplets #interconnect #bunchofwires #odsa #ucie #pcie via @LinleyGroup