Semiconductor Engineering
Semiconductor Engineering was established by a diverse group of chip designers, engineers, journalists, users, industry organizations, and standards groups to offer valuable insights into the intricate processes of semiconductor design, testing, verification, integration, and manufacturing, as well as the market trends that drive these activities. The aim of this platform is to deliver practical, independently created content through focused monthly newsletters, weekly updates, timely news alerts, videos, independent research, and a forum for discussion and inquiry. Although the site is backed by sponsors, the content produced by our team adheres to the highest standards of journalistic integrity and impartiality. All articles are professionally crafted and vetted by independent journalists and engineers who possess extensive industry expertise, with vendor participation limited to offering insights rather than promoting their products. Founded in 2008, Sperling Media Group LLC focuses on providing a transparent flow of unbiased information concerning technology and business matters in specialized yet demanding markets. In an era of increasing complexity, where genuine insights are crucial, the availability of independent information sources is dwindling.
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Global
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Computers Electronics and Technology/Computer Hardware
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Articles
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1 week ago |
semiengineering.com | Bryon Moyer
Electrical interposers provide a convenient surface for mounting multiple chips within a single package, but even though interposer lines theoretically can be routed anywhere, insertion losses limit their practical length. Lines on interposers — and on silicon interposers in particular — can be exceedingly narrow. Having a small cross-section makes such lines resistive, degrading signals the farther they travel.
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1 week ago |
semiengineering.com | Gregory Haley
As artificial intelligence (AI) workloads grow larger and more complex, the various processing elements being developed to process all that data are demanding unprecedented levels of power. But delivering this power efficiently and reliably, without degrading signal integrity or introducing thermal bottlenecks, has created some of the toughest design and manufacturing challenges in semiconductor history.
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1 week ago |
semiengineering.com | Ed Sperling
Semiconductor Engineering sat down to discuss the challenges of designing and testing multi-die systems, including how to ensure they will work as expected, with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Zeng, senior engineering group director at Cadence; Anand Thiruvengadam, senior director and head of AI product management at Synopsys.
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1 week ago |
semiengineering.com | Jesse Allen
Synopsys’ John Koeter and other industry experts discuss whether high-bandwidth memory should follow established standards for broad compatibility and scalability or be customized to address specific use case requirements and time-to-market targets. In a podcast, Siemens’ Conor Peick, Dale Tutt, and Mike Ellow chat about how progress in 3D-IC development, thermal management, and the industrial metaverse marks a paradigm shift for EDA and other engineering software tools.
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1 week ago |
semiengineering.com | Jesse Allen
Superlattice castellated FETsResearchers from the University of Bristol and Northrop Grumman Mission Systems discovered a latch-effect in gallium nitride (GaN) that could lead to improved radio frequency device performance, crucial for enabling 6G devices. “We have piloted a device technology, working with collaborators, called superlattice castellated field effect transistors (SLCFETs), in which more than 1000 fins with sub-100 nm width help drive the current.
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