Gregory Haley

United States

Technology Editor at Semiconductor Engineering

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Articles

Power Delivery Challenges For AI Chips

1 week ago | semiengineering.com | Gregory Haley

As artificial intelligence (AI) workloads grow larger and more complex, the various processing elements being developed to process all that data are demanding unprecedented levels of power. But delivering this power efficiently and reliably, without degrading signal integrity or introducing thermal bottlenecks, has created some of the toughest design and manufacturing challenges in semiconductor history.
Photomask Changes And Challenges At Mature And Advanced Nodes

1 week ago | semiengineering.com | Gregory Haley

Experts at the Table: Semiconductor Engineering sat down to discuss the current state and future direction of mask-making, with Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows are excerpts of that conversation. To view part one of this discussion, click here.
Rethinking Chip Reliability For Harsh Conditions

2 weeks ago | semiengineering.com | Gregory Haley

As semiconductors push into environments once considered untenable, reliability expectations are being redefined. From the vacuum of space and the inside of jet engines to deep industrial automation and electrified drivetrains, chips now must endure extreme temperature swings, corrosive atmospheres, mechanical vibration, radiation, and unpredictable power cycles, all while delivering increasingly complex functionality.
On The Ground At ECTC 2025

3 weeks ago | semiengineering.com | Gregory Haley

Home > Home > On The Ground At ECTC 2025 Inside Chips Podcast: Much more efficient computing, faster interconnects, and panel-level packaging.
Inside Chips Podcast: May 27

1 month ago | semiengineering.com | Gregory Haley

Home > Home > Inside Chips Podcast: May 27 News and insights from imec ITF World 2025. Jo De Boeck, chief strategy officer and EVP at imec, talks with Semiconductor Engineering Technology Editor Gregory Haley about system technology co-optimization and the intersection of technology and AI.
Mask Complexity, Cost, And Change

1 month ago | semiengineering.com | Gregory Haley

Experts at the Table: As leading-edge lithography nodes push further into EUV and beyond, mask-making has become one of the most critical and costly aspects of semiconductor manufacturing. At the same time, non-EUV applications are stretching the lifetime of older tools and processes, challenging the industry to find new solutions for both ends of the spectrum.
E-Beam Inspection Proves Essential For Advanced Nodes

1 month ago | semiengineering.com | Gregory Haley

Electron-beam inspection is proving to be indispensable for finding critical defects at sub-5nm dimensions. The challenge now is how to speed up the process to make it economically palatable to fabs. E-beam inspection’s notorious sensitivity-throughput tradeoff has made comprehensive defect coverage with e-beam at these advanced nodes especially problematic.
Need For Speed Drives Targeted Testing

2 months ago | semiengineering.com | Gregory Haley

As packaging complexity increases and nodes shrink, defect detection becomes significantly more difficult. Engineers must contend with subtle variations introduced during fabrication and assembly without sacrificing throughput. New material stacks degrade signal-to-noise ratios, which makes metrology more difficult.
Packaging With Fewer People And Better Results

2 months ago | semiengineering.com | Gregory Haley

Advanced packaging has evolved far beyond the simple stacking of dies and connecting of interposers. Once a passive conduit between silicon and the outside world, it has become an active component of overall device performance.
Nearly Invisible: Defect Detection Below 5nm

2 months ago | semiengineering.com | Gregory Haley

Detecting sub-5nm defects creates huge challenges for chipmakers, challenges that have a direct impact on yield, reliability, and profitability. In addition to being smaller and harder to detect, defects are often hidden beneath intricate device structures and packaging schemes. Moreover, traditional optical and electrical probing methods, trusted for decades, are proving inadequate against the complexity of modern chip architectures.