Katherine Derbyshire

Seattle

Technical Editor at Semiconductor Engineering

Journalism and analysis on the semiconductor and related industries. @[email protected] https://t.co/tvVexnN2hL

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Articles

Many Options For EUV Photoresists, No Clear Winner

1 month ago | semiengineering.com | Katherine Derbyshire

In EUV lithography, and especially high-numerical-aperture EUV, balancing tradeoffs between resolution, sensitivity and line-width roughness is becoming increasingly difficult. Lithography patterning using extreme UV exposure depends on a resist mask that can simultaneously meet targets of small feature resolution, high sensitivity to EUV wavelength, and acceptable linewidth roughness.
Memory Wall Problem Grows With LLMs

2 months ago | semiengineering.com | Katherine Derbyshire

The growing imbalance between the amount of data that needs to be processed to train large language models (LLMs) and the inability to move that data back and forth fast enough between memories and processors has set off a massive global search for a better and more energy- and cost-efficient solution. Much of this is evident in the numbers.
Improving GaN Device Architectures

Jan 23, 2025 | semiengineering.com | Katherine Derbyshire

As the universe of applications for power devices grows, designers are finding that no single semiconductor can cover the full range of voltage and current requirements. Instead, combination circuits use different materials for different parts of the overall operating range. GaN is especially well-established in low-power applications like chargers for personal electronics, while silicon and SiC have the advantage in high-power applications.
Challenges In Powering Electrification With GaN And SiC

Dec 16, 2024 | semiengineering.com | Katherine Derbyshire

The wish list of device properties that designers of power management systems would like to have is lengthy, but no single material is yet sufficient for the full range of power control applications. For control transistors to handle power surges, breakdown voltages should be at least triple the expected operating voltage — 1.2 kilovolts or more for many electric vehicle applications, and close to 200 volts for data center server racks.
Tradeoffs In Leading-Edge Chip Design

Nov 20, 2024 | semiengineering.com | Katherine Derbyshire

Device design begins with the anticipated workload. What is it actually supposed to do? What resources — computational units, memory, sensors — are available? Answering these questions and developing the functional architecture are the first steps in a new design — well before committing it to silicon, said Tim Kogel, senior director of technical product management at Synopsys. Yet even these early decisions begin to constrain the physical architecture.
2D Semiconductors Make Progress, But So Does Silicon

Oct 29, 2024 | semiengineering.com | Katherine Derbyshire

Semiconductor industry researchers have been anticipating the need for better transistor channel materials to replace silicon for a long time, but silicon devices have continued to improve enough to postpone that change. Silicon continues to provide an unmatched combination of device performance, manufacturability, and cost effectiveness. In recent years, though, the “end of silicon” channels has become much more likely.
Preparing For Ferroelectric Devices

Oct 1, 2024 | semiengineering.com | Katherine Derbyshire

The discovery of ferroelectricity in materials that are compatible with integrated circuit manufacturing has sparked a wave of interest in ferroelectric devices. Ferroelectrics are materials with a permanent polarization, the direction of which can be switched by an applied field. This polarization can be used to raise or lower the threshold voltage of a transistor, as in FeFETs, or it can change the tunneling resistance of a junction, as in ferroelectric tunnel junctions (FTJs).
Reasons To Know IGZO

Aug 14, 2024 | semiengineering.com | Katherine Derbyshire

Interest in monolithic 3D integration is driven by both compute-in-memory applications and a more general need for increased circuit density. Compute-in-memory architectures seek to reduce the power requirements of machine learning workloads, which are dominated by the movement of data between memory and logic components.
New Interconnect Metals Need New Dielectrics

Jul 22, 2024 | semiengineering.com | Katherine Derbyshire

Just as circuit metallization must evolve to manage resistance as features shrink, so must the dielectric half of the interconnect stack. For quite some time, manufacturers have needed a dielectric constant (k) less than 4, which is the value for SiO2, but they have struggled to find materials that combine a low dielectric constant with mechanical and chemical stability.
Ruthenium Interconnects On Tap

Jun 19, 2024 | semiengineering.com | Katherine Derbyshire

Chipmakers’ focus on new interconnect technology is ramping up as copper’s effectiveness continues to diminish, setting the stage for a significant shift that could improve performance and reduce heat at future nodes and in advanced packages. The introduction of copper interconnects in 1997 upended the then-standard tungsten via/aluminum line metallization scheme.