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1 month ago | 
design-reuse.com | Nitin Dahad
May. 29, 2025 – By Nitin Dahad, EETimes (May 27, 2025)
At its 2025 Europe Technology Symposium in Amsterdam, The Netherlands, TSMC announced that it is establishing a European design center in Munich, scheduled to open in Q3 2025 in order to support its European customers.
The company said that this will be its tenth design center, joining a network of design centers across Taiwan, the U.S., Canada, mainland China and Japan.
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1 month ago | 
design-reuse.com | Pablo Valerio
May. 26, 2025 – Open architecture reshaping the global semiconductor landscape
By Pablo Valerio, EETimes (May 22, 2025)
In 2010, a modest summer project at UC Berkeley sought a suitable instruction set architecture (ISA). Now, 15 years later, RISC-V is a global alternative to commercial chip architectures.
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1 month ago | 
design-reuse.com | Anne-Francoise Pele |Anne-Françoise Pelé
May. 19, 2025, May. 19, 2025 – Emmanuel Till-Vattier, VP of Sales EMEA at Codasip, presented a brief product update at this week’s RISC-V Summit Europe 2025 in Paris.
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1 month ago | 
design-reuse.com | Rene Haas |René Lankenau Haas
May. 16, 2025 – By Rene Haas, CEO, Arm
The future of AI compute is being built on Arm.
AI continues to transform every major market — from the largest datacenters to the smallest devices, such as earbuds — intensifying the demands on compute. Our industry faces a fundamental challenge: delivering massive performance gains while keeping power consumption in check.
As AI workloads are added to rapidly evolving compute demands, power efficiency at the system-on-chip level is more important than ever.
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1 month ago | 
design-reuse.com | Nitin Dahad
By Nitin Dahad, EETimes (May 9, 2025) At last month’s Andes Technology RISC-V Con event in San Jose, CA, the company announced a number of partnerships with companies like Imagination Technologies, Baya Systems, S2C and Brainchip as it celebrated its 20th anniversary.
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1 month ago | 
design-reuse.com | Peter Clarke
By Peter Clarke, eeNews Europe (May 6, 2025) Circuit IP licensor Agile Analog Ltd. (Cambridge, England) has appointed experienced chip executive and entrepreneur Krishna Anne as CEO with a charter to drive growth at the company. Anne replaces Barry Patterson who joined EDA company Cadence Design Systems as a project manager in December 2024. Click here to read more ...
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2 months ago | 
design-reuse.com
Engineering teams must coordinate across hardware and software domains as system-on-chip (SoC) designs scale in complexity. Designers must verify that register definitions remain accurate and synchronized throughout the development cycle.
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2 months ago | 
design-reuse.com | Pablo Valerio
Manufacturing landscape reconfigured by AI frenzy and shifting architectures By Pablo Valerio, EETimes (April 15, 2025) The global semiconductor manufacturing sector, the invisible engine powering the digital age, is undergoing a profound transformation marked by surging demand for artificial intelligence, intensifying competition among processor architectures, and a concerted effort to reshape intricate international supply chains.
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2 months ago | 
design-reuse.com | Nick Flaherty
By Nick Flaherty, eeNews Europe (April 16, 2025) European and Japanese suppliers of semiconductor equipment are set to be targeted in the next round of tariffs by the US. The Bureau of Industry and Security at the US Department of Commerce is requesting public comments on a national security investigation on the import of semiconductors and semiconductor manufacturing equipment. Click here to read more ...
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2 months ago | 
design-reuse.com | Sally Ward-Foxton
By Sally Ward-Foxton, EETimes (April 10, 2025) SAN JOSE, Calif. – U.S. hyperscalers like AWS, Google and Microsoft have designed their own CPUs for the data center in recent years, investing hundreds of millions of dollars into their own chip designs. All these CPUs are based on Arm. But with other options on the market, what motivates these companies to spend the time and money on building their own silicon?